Research Article

A 1.5-V, 10-bit, 200-MS/s CMOS Pipeline Analog-to-Digital Converter

by  Manju Devi, Arunkumar P Chavan, K. N Muralidhara
journal cover
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 88 - Issue 7
Published: February 2014
Authors: Manju Devi, Arunkumar P Chavan, K. N Muralidhara
10.5120/15366-3869
PDF

Manju Devi, Arunkumar P Chavan, K. N Muralidhara . A 1.5-V, 10-bit, 200-MS/s CMOS Pipeline Analog-to-Digital Converter. International Journal of Computer Applications. 88, 7 (February 2014), 35-39. DOI=10.5120/15366-3869

                        @article{ 10.5120/15366-3869,
                        author  = { Manju Devi,Arunkumar P Chavan,K. N Muralidhara },
                        title   = { A 1.5-V, 10-bit, 200-MS/s CMOS Pipeline Analog-to-Digital Converter },
                        journal = { International Journal of Computer Applications },
                        year    = { 2014 },
                        volume  = { 88 },
                        number  = { 7 },
                        pages   = { 35-39 },
                        doi     = { 10.5120/15366-3869 },
                        publisher = { Foundation of Computer Science (FCS), NY, USA }
                        }
                        %0 Journal Article
                        %D 2014
                        %A Manju Devi
                        %A Arunkumar P Chavan
                        %A K. N Muralidhara
                        %T A 1.5-V, 10-bit, 200-MS/s CMOS Pipeline Analog-to-Digital Converter%T 
                        %J International Journal of Computer Applications
                        %V 88
                        %N 7
                        %P 35-39
                        %R 10.5120/15366-3869
                        %I Foundation of Computer Science (FCS), NY, USA
Abstract

Analog-to-digital converters (ADCs) are required in almost all communication and signal processing applications. This paper describes a 1. 5-v, 10-bit, 200-Msample/s pipeline analog-to-digital converter in 0. 18-µm CMOS technology. The entire circuit architecture is built with a modular approach consisting of identical units organized into an easily expandable pipeline chain. The converter uses ten stage pipelined architecture with fully differential analog circuits, with a full-scale sinusoidal input at 10 MHz's A special focus is made on pipelined ADC for its superior performance in terms of speed and resolution.

References
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Index Terms
Computer Science
Information Sciences
No index terms available.
Keywords

Analog-to-Digital converters (ADCs) Pipeline High Speed

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