Research Article
Implementation of Low Leakage and High Performance 8-Bit ALU for Low Power Digital Circuits
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
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| Volume 82 - Issue 18 |
| Published: November 2013 |
| Authors: Sk. Mahammad Akram, V. Leela Rani, K. Sailaja |
10.5120/14265-2411
|
Sk. Mahammad Akram, V. Leela Rani, K. Sailaja . Implementation of Low Leakage and High Performance 8-Bit ALU for Low Power Digital Circuits. International Journal of Computer Applications. 82, 18 (November 2013), 24-28. DOI=10.5120/14265-2411
@article{ 10.5120/14265-2411,
author = { Sk. Mahammad Akram,V. Leela Rani,K. Sailaja },
title = { Implementation of Low Leakage and High Performance 8-Bit ALU for Low Power Digital Circuits },
journal = { International Journal of Computer Applications },
year = { 2013 },
volume = { 82 },
number = { 18 },
pages = { 24-28 },
doi = { 10.5120/14265-2411 },
publisher = { Foundation of Computer Science (FCS), NY, USA }
}
%0 Journal Article
%D 2013
%A Sk. Mahammad Akram
%A V. Leela Rani
%A K. Sailaja
%T Implementation of Low Leakage and High Performance 8-Bit ALU for Low Power Digital Circuits%T
%J International Journal of Computer Applications
%V 82
%N 18
%P 24-28
%R 10.5120/14265-2411
%I Foundation of Computer Science (FCS), NY, USA
Abstract
The insist for portable devices is fulfilled by the growing CMOS technology. As the size of the transistor shrinks, the leakage power component augments exponentially. Thus it becomes a critical metric for the future technologies. This paper deals with the techniques like GATED VDD, AVLS, AVLG, and AVL for reducing leakage power. These techniques are implemented on 8-bit ALU. 80% of cutback in leakage power can be achieved by applying proposed technique with minimum delay and area overhead. The circuit is simulated on cadence(R) Virtuoso(R) in 90 nanometer CMOS technology.
References
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