Research Article
High Quality FPGA Optimized Random Number Generator
|
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
|
| Volume 67 - Issue 17 |
| Published: April 2013 |
| Authors: V. Navya Deepthi, A. Ruhan Bevi, V. Sai Keerthi |
10.5120/11484-7186
|
V. Navya Deepthi, A. Ruhan Bevi, V. Sai Keerthi . High Quality FPGA Optimized Random Number Generator. International Journal of Computer Applications. 67, 17 (April 2013), 1-4. DOI=10.5120/11484-7186
@article{ 10.5120/11484-7186,
author = { V. Navya Deepthi,A. Ruhan Bevi,V. Sai Keerthi },
title = { High Quality FPGA Optimized Random Number Generator },
journal = { International Journal of Computer Applications },
year = { 2013 },
volume = { 67 },
number = { 17 },
pages = { 1-4 },
doi = { 10.5120/11484-7186 },
publisher = { Foundation of Computer Science (FCS), NY, USA }
}
%0 Journal Article
%D 2013
%A V. Navya Deepthi
%A A. Ruhan Bevi
%A V. Sai Keerthi
%T High Quality FPGA Optimized Random Number Generator%T
%J International Journal of Computer Applications
%V 67
%N 17
%P 1-4
%R 10.5120/11484-7186
%I Foundation of Computer Science (FCS), NY, USA
Abstract
In this paper we designed a new type of Random number generator by using shift registers and LUT with D-FF as input to it. The algorithm used to generate random numbers is realized using simple xor circuit and implemented on a Virtex II FPGA from Xilinx. This designed block indicate a good sequence of random numbers which is used in high-speed data processor, Testing Instruments, Finding Laser Range, Time-of-flight mass spectrometry experiments etc. The randomness of this type of RNG is tested using NIST statistical test and this method has produced good results.
References
- D. B. Thomas and W. Luk, "High quality uniform random number generation using LUT optimised state-transition matrices," J. VLSI Signal Process. , vol. 47, no. 1, pp. 77–92, 2007.
- D. B. Thomas and W. Luk, "FPGA-optimised high-quality uniform random number generators," in Proc. Field Program. Logic Appl. Int. Conf. , 2008, pp. 235–244.
- P. L'Ecuyer, "Tables of maximally equidistributed combined LFSR generators," Math. Comput. , vol. 68, no. 225, pp. 261–269, 1999.
- D. B. Thomas and W. Luk, "FPGA-optimised uniform random number generators using luts and shift registers," in Proc. Int. Conf. Field Program. Logic Appl. , 2010, pp. 77–82.
- M. Matsumoto and T. Nishimura, "Mersenne twister: A 623-dimensionally equidistributed uniform pseudo-random number generator,"ACM Trans. Modeling Comput. Simulat. , vol. 8, no. 1, pp. 3–30,Jan. 1998.
- M. Saito and M. Matsumoto, "SIMD-oriented fast mersenne twister: A 128-bit pseudorandom number generator," in Monte-Carlo and Quasi-Monte Carlo Methods. New York: Springer-Verlag, 2006, pp. 607–622.
- F. Panneton, P. L'Ecuyer, and M. Matsumoto, "Improved long-period generators based on linear recurrence modulo 2," ACM Trans. Math. Software, vol. 32, no. 1, pp. 1–16, 2006.
- M. Matsumoto and Y. Kurita, "Twisted GFSR generators II," ACM Trans. Modeling Comput. Simulat. , vol. 4, no. 3, pp. 254–266, 1994.
- Marc-Andre Daigneault and Jean Pierre David, "A High-Resolution Time-to-Digital Converter on FPGA Using Dynamic Reconfiguration," IEEE transactions on instrumentation and measurement,vol. 60,no. 6,2011.
- S. Konuma and S. Ichikawa, "Design and evaluation of hardware pseudorandom number generator mt19937," IEICE Trans. Inf. Syst. ,vol. 88, no. 12, pp. 2876–2879, 2005.
- Pierre L'Ecuyer "Maximally Equidistributed combined tausworthe generators". Mathematics of Computation,65(213):203–213, 1996.
- A. Rukhin, J. Soto, J. Nechvatal, M. Smid, E. Barker, S. Leigh, M. Levenson, M. Vangel, D. Banks, A. Heckert, J. Dray, S. Vo, "A Statistical Test Suite for Random and Pseudorandom Number Generators for Cryptographic Applications," National Institute of Standard and Technology Special Publication 800-22 Revision 1, August 2008.
- Marsaglia, G. ,Diehard: A battery of tests for RNG, 1985, http://stat. fsu. edu/~geo/diehard. html.
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