Research Article

Design of Fault Tolerant Reversible Multiplexer based Multi-Boolean Function Generator using Parity Preserving Gates

by  Rakshith Saligram, Shrihari Shridhar Hegde, Shashidhar A Kulkarni, H R Bhagyalakshmi, M K Venkatesha
journal cover
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 66 - Issue 19
Published: March 2013
Authors: Rakshith Saligram, Shrihari Shridhar Hegde, Shashidhar A Kulkarni, H R Bhagyalakshmi, M K Venkatesha
10.5120/11193-6325
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Rakshith Saligram, Shrihari Shridhar Hegde, Shashidhar A Kulkarni, H R Bhagyalakshmi, M K Venkatesha . Design of Fault Tolerant Reversible Multiplexer based Multi-Boolean Function Generator using Parity Preserving Gates. International Journal of Computer Applications. 66, 19 (March 2013), 20-24. DOI=10.5120/11193-6325

                        @article{ 10.5120/11193-6325,
                        author  = { Rakshith Saligram,Shrihari Shridhar Hegde,Shashidhar A Kulkarni,H R Bhagyalakshmi,M K Venkatesha },
                        title   = { Design of Fault Tolerant Reversible Multiplexer based Multi-Boolean Function Generator using Parity Preserving Gates },
                        journal = { International Journal of Computer Applications },
                        year    = { 2013 },
                        volume  = { 66 },
                        number  = { 19 },
                        pages   = { 20-24 },
                        doi     = { 10.5120/11193-6325 },
                        publisher = { Foundation of Computer Science (FCS), NY, USA }
                        }
                        %0 Journal Article
                        %D 2013
                        %A Rakshith Saligram
                        %A Shrihari Shridhar Hegde
                        %A Shashidhar A Kulkarni
                        %A H R Bhagyalakshmi
                        %A M K Venkatesha
                        %T Design of Fault Tolerant Reversible Multiplexer based Multi-Boolean Function Generator using Parity Preserving Gates%T 
                        %J International Journal of Computer Applications
                        %V 66
                        %N 19
                        %P 20-24
                        %R 10.5120/11193-6325
                        %I Foundation of Computer Science (FCS), NY, USA
Abstract

Reversible logic is one of the emerging fields of research in the areas of low power computation, Optical information processing, Fault tolerant system, bio information, quantum computation and nanotechnology. ALU is the most vital component of any processing system and need to consume as much less energy as possible in the mean while must be resistant to faults. In this paper the design of a fault tolerant function generator is brought out that can generate up to 16 different Boolean Functions. This unit is the logical unit of an ALU.

References
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Index Terms
Computer Science
Information Sciences
No index terms available.
Keywords

Reversible Logic Parity Preserving Gates Multi-Boolean Function Generator Logic Unit Nanotechnology

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