Research Article

Minimization of Switching Losses for Diode Clamped Multilevel Inverter

by  R. Pon Perumal, W. Razia Sultana, Sarat Kumar Sahoo
journal cover
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 44 - Issue 11
Published: April 2012
Authors: R. Pon Perumal, W. Razia Sultana, Sarat Kumar Sahoo
10.5120/6305-8625
PDF

R. Pon Perumal, W. Razia Sultana, Sarat Kumar Sahoo . Minimization of Switching Losses for Diode Clamped Multilevel Inverter. International Journal of Computer Applications. 44, 11 (April 2012), 6-11. DOI=10.5120/6305-8625

                        @article{ 10.5120/6305-8625,
                        author  = { R. Pon Perumal,W. Razia Sultana,Sarat Kumar Sahoo },
                        title   = { Minimization of Switching Losses for Diode Clamped Multilevel Inverter },
                        journal = { International Journal of Computer Applications },
                        year    = { 2012 },
                        volume  = { 44 },
                        number  = { 11 },
                        pages   = { 6-11 },
                        doi     = { 10.5120/6305-8625 },
                        publisher = { Foundation of Computer Science (FCS), NY, USA }
                        }
                        %0 Journal Article
                        %D 2012
                        %A R. Pon Perumal
                        %A W. Razia Sultana
                        %A Sarat Kumar Sahoo
                        %T Minimization of Switching Losses for Diode Clamped Multilevel Inverter%T 
                        %J International Journal of Computer Applications
                        %V 44
                        %N 11
                        %P 6-11
                        %R 10.5120/6305-8625
                        %I Foundation of Computer Science (FCS), NY, USA
Abstract

Multilevel inverters are emerging as a most promising alternative for reducing the harmonics and to achieve high-voltage, high-power capability but switching losses are increased because of increased device count. Many modulation techniques like soft switching techniques, space vector-based PWM techniques or sinusoidal PWM-based techniques were employed to reduce the switching losses. In this paper, a carrier-based closed-loop PWM control technique has been proposed based on insertion of 'no switching' zone within each positive and negative half cycle of fundamental wave to reduce the switching losses. This method effectively reduces the switching losses of three-level inverter as it does not require any complex mathematical expressions involved in space vector based technique. Moreover, THD is found within 5% for a switching frequency of 5 kHz with proposed technique over conventional SPWM technique. Simulation results are presented to validate the proposed technique. Comparisons are made between switching losses of conventional and proposed control technique of three level diode clamped inverter.

References
  • A. Nabae, I. Takahashi, and H. Akagi, "A new neutral- point clamped PWM inverter," IEEE Trans. Ind. Applicat. , vol. IA- 17, pp. 518–523, Sept. /Oct. 1981.
  • J. Rodriguez, J. -S. Lai, and F. Z. Peng, "Multilevel inverters: " A survey of topologies, controls, and applications," IEEE Trans. Ind. Electron. , vol. 49, no. 4, pp. 724–738, Aug. 2002.
  • Leon M. Tolbert, Fang Zheng Peng, and Thomas G. Habetler, " Multilevel Converters for Large Electric Drives" , IEEE Trans. Ind. Electron. , VOL. 35, NO. 1, jan/feb. 1999.
  • Jose Rodriguez, Steffen Bernet , Peter K. Steimer and Ignacio E. Lizama, "A Survey on Neutral-Point- Clamped Inverters", IEEE Trans. Ind. Electron, vol. 57, no. 7, pp. 2219-2230, july 2010.
  • Peter, K. , Lenke, R. U. , Schroder, S. , Doncker, R. W. D. "Design of a flexible control platform for soft-switching multilevel inverters", IEEE Trans. Power Electron,vol. 2, no. 5, pp. 1778– 178, 2007.
  • Luigi, M. , Paolo, T. , Toigo, V. : "Space vector control and current harmonics in quasi-resonant soft-switching PWM conversion", IEEE Trans. Ind. Appl. ,vol. 32, no. 2, pp. 269–278, 1996.
  • Lei, L. , Yunping, Z. , Jie, Z. , Xudong, Z. :" Digital implementation of diode clamped three level SVPWM inverter". Proc. PEDS, vol. 2, pp 1413–1417, November 2003.
  • Chaturvedi, P. K. ,Jain, S. , Agarwal, P. : 'Switching losses and harmonic investigations in multilevel inverters', IETE J. Res. , vol. 54, no. 4, pp. 295–305, 2008.
  • Ned, M. , Undeland, T. M. ,Robbins,WP:"Power electronics converters, applications and design" (John Willey & Sons, 2001, 3rd edn. )
  • Rashid, M. H. :"Power electronics handbook" (Academic Press, New York, 2001, 3 rd edn. )
  • Paul C. Krause, Oleg Wasynczuk, Scott. Sudhoff, 'Analysis of Electric machinery and Drive (Wiley & sons , 2002, 2nd edn).
Index Terms
Computer Science
Information Sciences
No index terms available.
Keywords

Multilevel Inverters Carrier Based Pulse Width Modulation Switching Losses Total Harmonic Distortion

Powered by PhDFocusTM