Research Article

Review of XY Routing Algorithm for Network-on-Chip Architecture

by  Shubhangi D Chawade, Mahendra A Gaikwad, Rajendra M Patrikar
journal cover
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 43 - Issue 21
Published: April 2012
Authors: Shubhangi D Chawade, Mahendra A Gaikwad, Rajendra M Patrikar
10.5120/6387-8691
PDF

Shubhangi D Chawade, Mahendra A Gaikwad, Rajendra M Patrikar . Review of XY Routing Algorithm for Network-on-Chip Architecture. International Journal of Computer Applications. 43, 21 (April 2012), 20-23. DOI=10.5120/6387-8691

                        @article{ 10.5120/6387-8691,
                        author  = { Shubhangi D Chawade,Mahendra A Gaikwad,Rajendra M Patrikar },
                        title   = { Review of XY Routing Algorithm for Network-on-Chip Architecture },
                        journal = { International Journal of Computer Applications },
                        year    = { 2012 },
                        volume  = { 43 },
                        number  = { 21 },
                        pages   = { 20-23 },
                        doi     = { 10.5120/6387-8691 },
                        publisher = { Foundation of Computer Science (FCS), NY, USA }
                        }
                        %0 Journal Article
                        %D 2012
                        %A Shubhangi D Chawade
                        %A Mahendra A Gaikwad
                        %A Rajendra M Patrikar
                        %T Review of XY Routing Algorithm for Network-on-Chip Architecture%T 
                        %J International Journal of Computer Applications
                        %V 43
                        %N 21
                        %P 20-23
                        %R 10.5120/6387-8691
                        %I Foundation of Computer Science (FCS), NY, USA
Abstract

The Network-on-Chip (NoC) is Network-version of System-on-Chip (SoC) means that on-chip communication is done through packet based networks. In NOC topology, routing algorithm and switching are main terminology . The routing algorithm is one of the key factor in NOC architecture. The routing algorithm ,which defines as the path taken by a packet between the source and the destination . As XY routing algorithm mainly used in NOC because of its simplicity. This paper basically review of XY routing algorithm in which we study a different type of XY routing algorithm. The classification of XY routing algorithm is totally depend upon the environment and requirement. Such that IX/Y routing algorithm is for less collision in network, for deadlock-free and livelock-free DyXY is used, for fault-tolerant XYX routing algorithm is proposed and Adaptive XY routing algorithm is used for fully utilization of network resource.

References
  • W. J. Dally and B. Towles. 2001 Route packets, not wires:On-chip interconnection networks.
  • L. Benini and G. DeMicheli. 2002 Networks on chips: Anew SoC paradigm.
  • Wang Zhang, Ligang Hou, Jinhui Wang, Shuqin Geng, Wuchen Wu. Comparison Research between XY and Odd-Even Routing Algorithm of a 2-Dimension 3X3 Mesh Topology Network-on-Chip
  • A. Hemani, A. Jantsch, S. Kumar, A. Postula, J. Oberg, M. Millberg,and D. Lindqvist. 2000 Network on a chip: An architecture for billion transistor era.
  • S. Kumar, A. Jantsch, M. Millberg, Oberg, Soininen, M. Forsell,K. Tiensyrja, and A. Hemani. 2002 A network on chip architecture and design methodology.
  • G. Acsia, V. Catania, M. Palesi, D. Patti. 2008 A New Selection Strategy for on-Chip Networks
  • K. Chang, J. Shen and T. Chen. 2006 Evaluation and design trade-offs between circuit-switched and packet-switched NOCs for applicationspecific SOCs.
  • P. Marchal et al. 2005 Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs,
  • E. Salminen, A. Kulmala, and Timo D. Hamalainen, 2008 Survey of Network-on-Chip proposals
  • Yuan-Long Jeang, Tzuu-shaang Wey, Hung-Yu Wang, Chung-Wei Hung, and Ji-Hong Liu. An Adaptive Routing Algorithm for Mesh-Tree Architecture in Network-on-Chip Designs
  • J. Duato, S. Yalamanchili, L. Ni, Interconnection networks: anengineering approach, Morgan Kaufmann, Revised Edition, 2002.
  • P. Gratz, B. Grot, and S. W. Keckler. Regional congestion awareness for load balance in networks-on-chip. High Performance ComputerArchitecture, 2008. HPCA 2008. IEEE 14th International Symposium on, pages 203-214, Feb. 2008.
  • Mohsen Nickray, Masood Dehyadgari, Ali Afzali-kusha "Adaptive Routing Using Context-Aware Agents for Networks on Chips"
  • W. Dally and B. Towles, "Route packets, not wires: on-chip interconnection networks," in DAC, 2001, pp. 684–689.
  • Wang Zhang, Ligang Hou, Jinhui Wang, Shuqin Geng, Wuchen Wu "Comparison Research between XY and Odd-Even Routing Algorithm of a 2-Dimension 3X3 Mesh Topology Network-on-Chip"
  • Ahmad M. Shafiee, Mehrdad Montazeri, and Mahdi Nikdast ," An Innovational Intermittent Algorithm in Networks-On-Chip (NOC)"
  • Ming Li, Qing-An Zeng, Wen-Ben Jone, "DyXY - A Proximity Congestion-Aware Deadlock-Free Dynamic Routing Method for Network on Chip"
  • Ahmad Patooghy and Seyed Ghassem Miremadi "XYX: A Power & Performance Efficient Fault-Tolerant Routing Algorithm for Network on Chip"
  • Mohsen Nickray, Masood Dehyadgari, Ali Afzali-kusha," Adaptive Routing Using Context-Aware Agents for Networks on Chips"
Index Terms
Computer Science
Information Sciences
No index terms available.
Keywords

Network-on-chip Xy Routing Algorithm Xyx Routing Algorithm Ix/y Routing Algorithm Dyxy Routing Algorithm.

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