Research Article
Implementation of FIR Filter and FFT Systems on a STRATIX-III FPGA Processor
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
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| Volume 39 - Issue 3 |
| Published: February 2012 |
| Authors: Prashanth B.U.V |
10.5120/4799-7018
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Prashanth B.U.V . Implementation of FIR Filter and FFT Systems on a STRATIX-III FPGA Processor. International Journal of Computer Applications. 39, 3 (February 2012), 16-19. DOI=10.5120/4799-7018
@article{ 10.5120/4799-7018,
author = { Prashanth B.U.V },
title = { Implementation of FIR Filter and FFT Systems on a STRATIX-III FPGA Processor },
journal = { International Journal of Computer Applications },
year = { 2012 },
volume = { 39 },
number = { 3 },
pages = { 16-19 },
doi = { 10.5120/4799-7018 },
publisher = { Foundation of Computer Science (FCS), NY, USA }
}
%0 Journal Article
%D 2012
%A Prashanth B.U.V
%T Implementation of FIR Filter and FFT Systems on a STRATIX-III FPGA Processor%T
%J International Journal of Computer Applications
%V 39
%N 3
%P 16-19
%R 10.5120/4799-7018
%I Foundation of Computer Science (FCS), NY, USA
Abstract
In this paper, the implementation of DSP modules like FIR Filter and FFT based sys-tems are designed and implemented. The de-sign is based on high performance FPGA “Cyclone II” and implementation is done after functional and timing simulation. The simula-tion tool used is ModelSim. The tool for syn-thesis and implementation is Quartus II. The experimental results shows the functional and timing analysis for all the DSP modules carried out using high performance synthesis software from Altera.
References
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- “A New Common Sub expression Elimi-nation Algorithm for Realizing Low-Complexity Higher Order Digital Filters”IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 29, No. 5, pp 844 - 848, May 2010.
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- Lawrence R. Rabiner, Ronald W. Scha-fer,(2011), Theory and Applications of Digital Speech Processing, 1e, Prentice Hall.
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