International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
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Volume 33 - Issue 3 |
Published: November 2011 |
Authors: Sarabdeep Singh, Dilip Kumar |
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Sarabdeep Singh, Dilip Kumar . Design of Area and Power Efficient Modified Carry Select Adder. International Journal of Computer Applications. 33, 3 (November 2011), 14-18. DOI=10.5120/3999-5666
@article{ 10.5120/3999-5666, author = { Sarabdeep Singh,Dilip Kumar }, title = { Design of Area and Power Efficient Modified Carry Select Adder }, journal = { International Journal of Computer Applications }, year = { 2011 }, volume = { 33 }, number = { 3 }, pages = { 14-18 }, doi = { 10.5120/3999-5666 }, publisher = { Foundation of Computer Science (FCS), NY, USA } }
%0 Journal Article %D 2011 %A Sarabdeep Singh %A Dilip Kumar %T Design of Area and Power Efficient Modified Carry Select Adder%T %J International Journal of Computer Applications %V 33 %N 3 %P 14-18 %R 10.5120/3999-5666 %I Foundation of Computer Science (FCS), NY, USA
Adders are one of the widely used digital components in digital integrated circuit design. The Carry Select Adder (CSA) provides a good compromise between cost and performance in carry propagation adder design. However, conventional CSA is still area-consuming due to the dual ripple carry adder (RCA) structure. In this paper, modification is done at gate-level to reduce area and power consumption. The Modified Carry Select-Adder (MCSA) is designed for 8-bit, 16-bit, 32-bit and 64-bit and then compared with conventional CSA respective architectures. MCSA shows reduction in area and power consumption in comparison with conventional CSA with small increase in delay.