International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
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Volume 22 - Issue 7 |
Published: May 2011 |
Authors: Pavan.T.K, Jagannadha Naidu.K, Nagaraju.V |
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Pavan.T.K, Jagannadha Naidu.K, Nagaraju.V . Implementation of Delay and Power Monitoring Schemes to Reduce the Power Consumption. International Journal of Computer Applications. 22, 7 (May 2011), 1-7. DOI=10.5120/2599-3613
@article{ 10.5120/2599-3613, author = { Pavan.T.K,Jagannadha Naidu.K,Nagaraju.V }, title = { Implementation of Delay and Power Monitoring Schemes to Reduce the Power Consumption }, journal = { International Journal of Computer Applications }, year = { 2011 }, volume = { 22 }, number = { 7 }, pages = { 1-7 }, doi = { 10.5120/2599-3613 }, publisher = { Foundation of Computer Science (FCS), NY, USA } }
%0 Journal Article %D 2011 %A Pavan.T.K %A Jagannadha Naidu.K %A Nagaraju.V %T Implementation of Delay and Power Monitoring Schemes to Reduce the Power Consumption%T %J International Journal of Computer Applications %V 22 %N 7 %P 1-7 %R 10.5120/2599-3613 %I Foundation of Computer Science (FCS), NY, USA
As process technology shrinks, the adaptive leakage power compensation scheme will become more important in realizing high-performance and low-power applications. In order to minimize total active power consumption in digital circuits, one must take into account sub-threshold leakage currents that grow exponentially as technology scales. This describes to predict how dynamic power and sub-threshold power must be balanced. The exclusive supply voltage control switching makes stable operations. The threshold voltage control successfully maintains a ratio of switching to leakage current and which represents the reduced power consumption. The goal of this paper is to: i) Maintains the optimized body bias conditions. ii) Maintains the best power-delay tradeoff. The results with a 180-nm CMOS device explain that the proposed architecture causes in the successful optimization of power.