Research Article

Comparative Analysis of 4-bit Low-power Encoders for 1 GS/s in 90 nm CMOS Technology

by  Reena G., Nagesh Ch.
journal cover
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 187 - Issue 50
Published: October 2025
Authors: Reena G., Nagesh Ch.
10.5120/ijca2025925828
PDF

Reena G., Nagesh Ch. . Comparative Analysis of 4-bit Low-power Encoders for 1 GS/s in 90 nm CMOS Technology. International Journal of Computer Applications. 187, 50 (October 2025), 1-9. DOI=10.5120/ijca2025925828

                        @article{ 10.5120/ijca2025925828,
                        author  = { Reena G.,Nagesh Ch. },
                        title   = { Comparative Analysis of 4-bit Low-power Encoders for 1 GS/s in 90 nm CMOS Technology },
                        journal = { International Journal of Computer Applications },
                        year    = { 2025 },
                        volume  = { 187 },
                        number  = { 50 },
                        pages   = { 1-9 },
                        doi     = { 10.5120/ijca2025925828 },
                        publisher = { Foundation of Computer Science (FCS), NY, USA }
                        }
                        %0 Journal Article
                        %D 2025
                        %A Reena G.
                        %A Nagesh Ch.
                        %T Comparative Analysis of 4-bit Low-power Encoders for 1 GS/s in 90 nm CMOS Technology%T 
                        %J International Journal of Computer Applications
                        %V 187
                        %N 50
                        %P 1-9
                        %R 10.5120/ijca2025925828
                        %I Foundation of Computer Science (FCS), NY, USA
Abstract

The meticulous design and optimization of the encoder is essential to achieve a high-performance in flash ADCs suitable which are used for high-speed applications. The encoder in a flash ADC is critical circuit because it translates the raw output from the comparators. The performance of a encoder affects the accuracy, speed, resolution, and overall quality of the ADC’s output and making it a pivotal circuit in the analog-to-digital conversion process. Three methods of encoders have been simulated that are pseudo-dynamic CMOS encoders, priority encoders, and MUX-based encoders at a sampling frequency of 1 GHz with a supply voltage of 0.8 V. According to the comparison, the MUX-based encoders have significant advantages and challenges when compared to priority and pseudo-dynamic CMOS encoder architectures. The MUX-based encoder provides increased flexibility, improved scalability, and easier implementation across a variety of input configurations, allowing for more flexible digital circuit designs with minimal added logic complexity. It is also suitable for designing ADCs for lowpower applications. The total power consumption of a 4-bit priority encoder is 25.36 μW. The total power consumption of a 4- bit pseudo-dynamic CMOS encoder is 41.76 μW. The power consumption of the 4-bit MUX-based encoder is 20.57 μW. From the simulation results, the MUX-based encoder circuit uses less power than the pseudo-dynamic CMOS encoder and priority encoder. The active area of the MUX-based encoder is 53.4 μm* 30.8 μm.

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Index Terms
Computer Science
Information Sciences
No index terms available.
Keywords

Flash ADC Thermometer code Priority Pseudo Multiplexer Encoder

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