Research Article
A Comparative Analysis of FIR Filters using Distributed Arithmetic Formulation
|
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
|
| Volume 170 - Issue 8 |
| Published: Jul 2017 |
| Authors: Anushree Ashokan, Himanshu Nautiyal, Pallav Parmar |
10.5120/ijca2017914929
|
Anushree Ashokan, Himanshu Nautiyal, Pallav Parmar . A Comparative Analysis of FIR Filters using Distributed Arithmetic Formulation. International Journal of Computer Applications. 170, 8 (Jul 2017), 25-28. DOI=10.5120/ijca2017914929
@article{ 10.5120/ijca2017914929,
author = { Anushree Ashokan,Himanshu Nautiyal,Pallav Parmar },
title = { A Comparative Analysis of FIR Filters using Distributed Arithmetic Formulation },
journal = { International Journal of Computer Applications },
year = { 2017 },
volume = { 170 },
number = { 8 },
pages = { 25-28 },
doi = { 10.5120/ijca2017914929 },
publisher = { Foundation of Computer Science (FCS), NY, USA }
}
%0 Journal Article
%D 2017
%A Anushree Ashokan
%A Himanshu Nautiyal
%A Pallav Parmar
%T A Comparative Analysis of FIR Filters using Distributed Arithmetic Formulation%T
%J International Journal of Computer Applications
%V 170
%N 8
%P 25-28
%R 10.5120/ijca2017914929
%I Foundation of Computer Science (FCS), NY, USA
Abstract
In this paper we are comparing the FIR filters by distributed arithmetic (DALUT) design using sharing lookup table and reconfigurable implementation of distributed arithmetic (RIDA) method. DA-based design with look-up table (LUT)-sharing technique for the computation of filter outputs and weight-increment terms of block least mean square BLMS algorithm. Besides, it offers significant saving of adders which constitute a major component of DA-based structures. While in the reconfigurable implementation of distributed arithmetic (DA) for post-processing applications is described. The input of DA is received in digital form and its analog coefficients are set by using the floating-gate voltage references. This is a major advantage of the DALUT structure for reducing its area delay product (ADP); particularly, when a large order adaptive digital Filter (ADF) is implemented for higher block-sizes.
References
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