Research Article

Testing Technique of BIST: A Survey

by  Sakshi Shrivastava, Paresh Rawat, Sunil Malviya
journal cover
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 161 - Issue 3
Published: Mar 2017
Authors: Sakshi Shrivastava, Paresh Rawat, Sunil Malviya
10.5120/ijca2017913133
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Sakshi Shrivastava, Paresh Rawat, Sunil Malviya . Testing Technique of BIST: A Survey. International Journal of Computer Applications. 161, 3 (Mar 2017), 22-25. DOI=10.5120/ijca2017913133

                        @article{ 10.5120/ijca2017913133,
                        author  = { Sakshi Shrivastava,Paresh Rawat,Sunil Malviya },
                        title   = { Testing Technique of BIST: A Survey },
                        journal = { International Journal of Computer Applications },
                        year    = { 2017 },
                        volume  = { 161 },
                        number  = { 3 },
                        pages   = { 22-25 },
                        doi     = { 10.5120/ijca2017913133 },
                        publisher = { Foundation of Computer Science (FCS), NY, USA }
                        }
                        %0 Journal Article
                        %D 2017
                        %A Sakshi Shrivastava
                        %A Paresh Rawat
                        %A Sunil Malviya
                        %T Testing Technique of BIST: A Survey%T 
                        %J International Journal of Computer Applications
                        %V 161
                        %N 3
                        %P 22-25
                        %R 10.5120/ijca2017913133
                        %I Foundation of Computer Science (FCS), NY, USA
Abstract

As the compactness of system-on-chip (SoC) increase, it becomes striking to integrate dedicated test logic on a chip. Starting with a broad idea of test problems, this survey paper focus on “Chip” Built in Self-Test (BIST) study and its promotion for board and system-level applications. This paper gives brief informative review of Built-in Self-test (BIST) and its testing techniques. Recently BIST Research is being highly used in VLSI and SoC testing for the detection fault coverage.

References
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Index Terms
Computer Science
Information Sciences
No index terms available.
Keywords

Built-in Self-test Circuit under test Device under test IC SOC CTL PRNG CRC.

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