|
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
|
| Volume 147 - Issue 13 |
| Published: Aug 2016 |
| Authors: Ashish Valuskar, Madhu Shandilya, Arvind Rajawat |
10.5120/ijca2016911313
|
Ashish Valuskar, Madhu Shandilya, Arvind Rajawat . FPGA Implementation of Ring and Star NoC Architectures. International Journal of Computer Applications. 147, 13 (Aug 2016), 34-36. DOI=10.5120/ijca2016911313
@article{ 10.5120/ijca2016911313,
author = { Ashish Valuskar,Madhu Shandilya,Arvind Rajawat },
title = { FPGA Implementation of Ring and Star NoC Architectures },
journal = { International Journal of Computer Applications },
year = { 2016 },
volume = { 147 },
number = { 13 },
pages = { 34-36 },
doi = { 10.5120/ijca2016911313 },
publisher = { Foundation of Computer Science (FCS), NY, USA }
}
%0 Journal Article
%D 2016
%A Ashish Valuskar
%A Madhu Shandilya
%A Arvind Rajawat
%T FPGA Implementation of Ring and Star NoC Architectures%T
%J International Journal of Computer Applications
%V 147
%N 13
%P 34-36
%R 10.5120/ijca2016911313
%I Foundation of Computer Science (FCS), NY, USA
Network on Chip Architecture (NoC) is considered as the next generation interconnects systems for multiprocessor systems-on-chip. Selection of the network architecture and mapping of IP nodes onto the NoC topology are two important research topics. In this paper, we proposed an implementation of a Ring and Star NoC architecture using store and forward technique.