Research Article
Improved Transient Response Capacitor-less Low Drop-out (LDO) Regulator using Current Mode Transconductance Amplifier and Slew Rate Enhancement Technique
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
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| Volume 135 - Issue 9 |
| Published: February 2016 |
| Authors: Anshu Gupta, Lalita Gupta, R.K. Baghel |
10.5120/ijca2016908500
|
Anshu Gupta, Lalita Gupta, R.K. Baghel . Improved Transient Response Capacitor-less Low Drop-out (LDO) Regulator using Current Mode Transconductance Amplifier and Slew Rate Enhancement Technique. International Journal of Computer Applications. 135, 9 (February 2016), 22-29. DOI=10.5120/ijca2016908500
@article{ 10.5120/ijca2016908500,
author = { Anshu Gupta,Lalita Gupta,R.K. Baghel },
title = { Improved Transient Response Capacitor-less Low Drop-out (LDO) Regulator using Current Mode Transconductance Amplifier and Slew Rate Enhancement Technique },
journal = { International Journal of Computer Applications },
year = { 2016 },
volume = { 135 },
number = { 9 },
pages = { 22-29 },
doi = { 10.5120/ijca2016908500 },
publisher = { Foundation of Computer Science (FCS), NY, USA }
}
%0 Journal Article
%D 2016
%A Anshu Gupta
%A Lalita Gupta
%A R.K. Baghel
%T Improved Transient Response Capacitor-less Low Drop-out (LDO) Regulator using Current Mode Transconductance Amplifier and Slew Rate Enhancement Technique%T
%J International Journal of Computer Applications
%V 135
%N 9
%P 22-29
%R 10.5120/ijca2016908500
%I Foundation of Computer Science (FCS), NY, USA
Abstract
This paper presents a capacitor-less low drop-out (LDO) regulator with current mode transconductance amplifier & slew-rate enhancement circuit. The proposed current mode transconductance amplifier as error amplifier improves the slew rate & slew- rate enhancement circuit further senses the transient voltage at the output of the LDO to increase the bias current of the error amplifier for a short duration. Hence, transient response of LDO has been further improved using these techniques. The proposed LDO regulator will be designed and simulated in 180nm CMOS technology.
References
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