International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
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Volume 130 - Issue 8 |
Published: November 2015 |
Authors: Naman Sharma, Rajat Sachdeva, Rajat Yadav, Upanshu Saraswat |
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Naman Sharma, Rajat Sachdeva, Rajat Yadav, Upanshu Saraswat . Implementation of a Fast and Power Efficient Carry Select Adder using Reversible Gates. International Journal of Computer Applications. 130, 8 (November 2015), 28-31. DOI=10.5120/ijca2015907075
@article{ 10.5120/ijca2015907075, author = { Naman Sharma,Rajat Sachdeva,Rajat Yadav,Upanshu Saraswat }, title = { Implementation of a Fast and Power Efficient Carry Select Adder using Reversible Gates }, journal = { International Journal of Computer Applications }, year = { 2015 }, volume = { 130 }, number = { 8 }, pages = { 28-31 }, doi = { 10.5120/ijca2015907075 }, publisher = { Foundation of Computer Science (FCS), NY, USA } }
%0 Journal Article %D 2015 %A Naman Sharma %A Rajat Sachdeva %A Rajat Yadav %A Upanshu Saraswat %T Implementation of a Fast and Power Efficient Carry Select Adder using Reversible Gates%T %J International Journal of Computer Applications %V 130 %N 8 %P 28-31 %R 10.5120/ijca2015907075 %I Foundation of Computer Science (FCS), NY, USA
All reversible circuits have an intrinsic advantage over traditional irreversible circuits, because the reduce power consumption. Due to this, reversible circuits have been a source of constant excitement and great enthusiasm in the scientific community. Reversible logic is highly useful in nanotechnology, low power design and quantum computing. This paper proposes a design for a faster adder using reversible gates.