Research Article
Design and Performance Analysis of Asynchronous GRO based Time to Digital Converter
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
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| Volume 112 - Issue 14 |
| Published: February 2015 |
| Authors: Anita Arvind Deshmukh, Akash Joshi, R. B. Deshmukh |
10.5120/19736-1530
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Anita Arvind Deshmukh, Akash Joshi, R. B. Deshmukh . Design and Performance Analysis of Asynchronous GRO based Time to Digital Converter. International Journal of Computer Applications. 112, 14 (February 2015), 26-31. DOI=10.5120/19736-1530
@article{ 10.5120/19736-1530,
author = { Anita Arvind Deshmukh,Akash Joshi,R. B. Deshmukh },
title = { Design and Performance Analysis of Asynchronous GRO based Time to Digital Converter },
journal = { International Journal of Computer Applications },
year = { 2015 },
volume = { 112 },
number = { 14 },
pages = { 26-31 },
doi = { 10.5120/19736-1530 },
publisher = { Foundation of Computer Science (FCS), NY, USA }
}
%0 Journal Article
%D 2015
%A Anita Arvind Deshmukh
%A Akash Joshi
%A R. B. Deshmukh
%T Design and Performance Analysis of Asynchronous GRO based Time to Digital Converter%T
%J International Journal of Computer Applications
%V 112
%N 14
%P 26-31
%R 10.5120/19736-1530
%I Foundation of Computer Science (FCS), NY, USA
Abstract
An Asynchronous Gated Ring Oscillator based Time to Digital Converter (A-GRO-TDC) is proposed. Gating functionality is added to a simple Ring Oscillator which drastically improves the system performance with asynchronous operation. Energy saving is possible due to scrambling and first order noise shaping. The proposed 9 bit A-GRO-TDC is implemented in Cadence using 0. 18µm digital CMOS Technology. Pre and post layout simulation with corner analysis shows good linearity. All these features with very little power between 16µW to 26µW make it suitable for IoT applications. It consumes an active area of 550µm x 410µm.
References
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