International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
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Volume 102 - Issue 4 |
Published: September 2014 |
Authors: Nehul Mathur, Sunil Sharma |
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Nehul Mathur, Sunil Sharma . Simulation of Convolutional Encoder and Viterbi Decoder using Verilog. International Journal of Computer Applications. 102, 4 (September 2014), 31-34. DOI=10.5120/17805-8625
@article{ 10.5120/17805-8625, author = { Nehul Mathur,Sunil Sharma }, title = { Simulation of Convolutional Encoder and Viterbi Decoder using Verilog }, journal = { International Journal of Computer Applications }, year = { 2014 }, volume = { 102 }, number = { 4 }, pages = { 31-34 }, doi = { 10.5120/17805-8625 }, publisher = { Foundation of Computer Science (FCS), NY, USA } }
%0 Journal Article %D 2014 %A Nehul Mathur %A Sunil Sharma %T Simulation of Convolutional Encoder and Viterbi Decoder using Verilog%T %J International Journal of Computer Applications %V 102 %N 4 %P 31-34 %R 10.5120/17805-8625 %I Foundation of Computer Science (FCS), NY, USA
In this paper, we are implementing the Convolutional encoder and viterbi decoder with code rate 2/3 using verilog. The main issue of this paper is to implement the RTL level model of Convolutional encoder and viterbi decoder, with the testing results of behavior model. We tried to achieve a low silicon cost. The viterbi algorithm, used for Convolutional codes extensively employed decoding algorithm for Convolutional codes. This paper is realized using verilog HDL. It is simulated and synthesized using Modelsim Altera 10. 1d.