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Design of Gain- Boosted Op Amp for Bias-And-Input Interchanging Technique in Low Power Pipelined ADC

Published on None 2011 by D.S.Shylu, D. Jackuline Moni, Ninu Prakash, T.Suganya, D.D.Rajendra Prasad
journal_cover_thumbnail
International Conference on VLSI, Communication & Instrumentation
Foundation of Computer Science USA
ICVCI - Number 13
None 2011
Authors: D.S.Shylu, D. Jackuline Moni, Ninu Prakash, T.Suganya, D.D.Rajendra Prasad
8f4bf8cf-97e7-46ce-86f3-6e1b839df2c7

D.S.Shylu, D. Jackuline Moni, Ninu Prakash, T.Suganya, D.D.Rajendra Prasad . Design of Gain- Boosted Op Amp for Bias-And-Input Interchanging Technique in Low Power Pipelined ADC. International Conference on VLSI, Communication & Instrumentation. ICVCI, 13 (None 2011), 21-24.

@article{
author = { D.S.Shylu, D. Jackuline Moni, Ninu Prakash, T.Suganya, D.D.Rajendra Prasad },
title = { Design of Gain- Boosted Op Amp for Bias-And-Input Interchanging Technique in Low Power Pipelined ADC },
journal = { International Conference on VLSI, Communication & Instrumentation },
issue_date = { None 2011 },
volume = { ICVCI },
number = { 13 },
month = { None },
year = { 2011 },
issn = 0975-8887,
pages = { 21-24 },
numpages = 4,
url = { /proceedings/icvci/number13/2726-1505/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on VLSI, Communication & Instrumentation
%A D.S.Shylu
%A D. Jackuline Moni
%A Ninu Prakash
%A T.Suganya
%A D.D.Rajendra Prasad
%T Design of Gain- Boosted Op Amp for Bias-And-Input Interchanging Technique in Low Power Pipelined ADC
%J International Conference on VLSI, Communication & Instrumentation
%@ 0975-8887
%V ICVCI
%N 13
%P 21-24
%D 2011
%I International Journal of Computer Applications
Abstract

This paper presents the design and implementation of low power Pseudo-differential bias-and-input interchange telescopic op- amp architecture. Op-amps sharing between two stages in one channel or across two parallel channels reduce the number of op-amps. The op-amp sharing technique reduces the number of active op-amps by about half and thus reduces the power consumption. In op-amp–sharing architectures, bias-and-input interchanging (BII) technique is used in which the op-amp summing nodes is resetted to remove the effect of residue signals in pipelined ADC. In the BII technique, the pseudo differential (PD) BII op-amp architecture is developed. Pipelined ADC is designed using 180nm technology.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Analog to digital converter (ADC) Operational amplifier (Op-amp) op-amp sharing